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Z8S18010FEC
IXYS Zilog Z8S18010FEC technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Mount | Surface Mount | |
| Package / Case | 80-BQFP | |
| Number of Pins | 80Pins | |
| Operating Temperature | -40°C~100°C TA | |
| Packaging | Tray | |
| Series | Z180 | |
| Published | 2000 | |
| JESD-609 Code | e0 | |
| Pbfree Code | no | |
| Part Status | Obsolete | |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) | |
| Number of Terminations | 80Terminations | |
| ECCN Code | 3A001.A.2.C | |
| Terminal Finish | Tin/Lead (Sn/Pb) | |
| HTS Code | 8542.31.00.01 | |
| Terminal Position | QUAD | |
| Terminal Form | GULL WING | |
| Peak Reflow Temperature (Cel) | 225 | |
| Supply Voltage | 5V | |
| Terminal Pitch | 0.8mm | |
| Frequency | 10MHz | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Pin Count | 80 | |
| Power Supplies | 5V | |
| Voltage | 5V | |
| uPs/uCs/Peripheral ICs Type | MICROPROCESSOR | |
| Core Processor | Z8S180 | |
| Supply Current-Max | 60mA | |
| Bit Size | 8 | |
| Access Time | 10 μs | |
| Address Bus Width | 20 | |
| Boundary Scan | NO | |
| Low Power Mode | YES | |
| External Data Bus Width | 8 | |
| Format | FIXED POINT | |
| Integrated Cache | NO | |
| Voltage - I/O | 5.0V | |
| Number of Cores/Bus Width | 1 Core 8-Bit | |
| Graphics Acceleration | No | |
| RAM Controllers | DRAM | |
| Additional Interfaces | ASCI, CSIO, UART | |
| Length | 20mm | |
| Height Seated (Max) | 3.1mm | |
| RoHS Status | Non-RoHS Compliant | |
| Lead Free | Contains Lead |
Z8S18010FEC
Download datasheets and manufacturer documentation for Z8S18010FEC
- DatasheetsZ8S18010FEC-Zilog-datasheet-24289.pdf
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