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- XC2S50-5PQG208I
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XC2S50-5PQG208I Tech Specifications
Xilinx XC2S50-5PQG208I technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Factory Lead Time | 10 Weeks | |
| Mount | Surface Mount | |
| Mounting Type | Surface Mount | |
| Package / Case | 208-BFQFP | |
| Number of Pins | 208Pins | |
| Number of I/Os | 140I/Os | |
| Operating Temperature | -40°C~100°C TJ | |
| Packaging | Tray | |
| Series | Spartan®-II | |
| Published | 2008 | |
| JESD-609 Code | e3 | |
| Pbfree Code | yes | |
| Part Status | Active | |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) | |
| Number of Terminations | 208Terminations | |
| ECCN Code | EAR99 | |
| Terminal Finish | Matte Tin (Sn) | |
| Voltage - Supply | 2.375V~2.625V | |
| Terminal Position | QUAD | |
| Terminal Form | GULL WING | |
| Peak Reflow Temperature (Cel) | 245 | |
| Supply Voltage | 2.5V | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Pin Count | 208 | |
| Number of Outputs | 176Outputs | |
| Qualification Status | Not Qualified | |
| Operating Supply Voltage | 2.5V | |
| RAM Size | 4kB | |
| Clock Frequency | 263MHz | |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
| Number of Logic Elements/Cells | 1728Logic Elements/Cells | |
| Total RAM Bits | 32768 | |
| Number of Gates | 50000Gates | |
| Number of LABs/CLBs | 384LABs/CLBs | |
| Speed Grade | 5 | |
| Combinatorial Delay of a CLB-Max | 0.7 ns | |
| Number of CLBs | 384CLBs | |
| Length | 28mm | |
| Height Seated (Max) | 4.1mm | |
| Width | 28mm | |
| RoHS Status | ROHS3 Compliant |
XC2S50-5PQG208I Documents
Download datasheets and manufacturer documentation for XC2S50-5PQG208I
- DatasheetsSpartan-II FPGA Family XC2S50-5PQG208I-Xilinx-datasheet-13696470.pdf
- Environmental InformationXilinx RoHS3
- PCN Assembly/OriginMult Dev LeadFrame Chg 29/Oct/2018
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