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- MC100EP105MNG
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MC100EP105MNG Tech Specifications
ON Semiconductor MC100EP105MNG technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Mount | Surface Mount | |
| Mounting Type | Surface Mount | |
| Package / Case | 32-VFQFN Exposed Pad | |
| Number of Pins | 32Pins | |
| Operating Temperature | -40°C~85°C | |
| Packaging | Tube | |
| Series | 100EP | |
| Published | 2006 | |
| JESD-609 Code | e3 | |
| Pbfree Code | yes | |
| Part Status | Obsolete | |
| Moisture Sensitivity Level (MSL) | 2 (1 Year) | |
| Number of Terminations | 32Terminations | |
| Terminal Finish | Tin (Sn) | |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V | |
| Packing Method | RAIL | |
| Voltage - Supply | 3V~5.5V | |
| Terminal Position | QUAD | |
| Number of Functions | 4Functions | |
| Supply Voltage | 3.3V | |
| Terminal Pitch | 0.5mm | |
| Base Part Number | 100EP105 | |
| Pin Count | 32 | |
| Number of Outputs | 2Outputs | |
| Output Type | Differential | |
| Supply Voltage-Max (Vsup) | 5.5V | |
| Supply Voltage-Min (Vsup) | 3V | |
| Propagation Delay | 350 ps | |
| Logic Function | AND, NAND | |
| Number of Inputs | 8 Input (2, 2, 2, 2)Input | |
| Halogen Free | Halogen Free | |
| Logic Type | AND/NAND Gate | |
| Number of Gates | 4Gates | |
| Prop. Delay@Nom-Sup | 375 ns | |
| High Level Output Current | -50mA | |
| Low Level Output Current | 50mA | |
| Power Supply Current-Max (ICC) | 85mA | |
| Schmitt Trigger Input | No | |
| Length | 5mm | |
| Height Seated (Max) | 1mm | |
| Width | 5mm | |
| RoHS Status | RoHS Compliant | |
| Lead Free | Lead Free |
MC100EP105MNG Documents
Download datasheets and manufacturer documentation for MC100EP105MNG
- DatasheetsMC10, MC100EP105
- PCN Obsolescence/ EOLEOL 21/Apr/2016
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