- Integrated Circuits (ICs)
- Logic - Shift Registers
- 74LVC595APW,112
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74LVC595APW,112
Nexperia 74LVC595APW,112 technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Factory Lead Time | 4 Weeks | |
| Contact Plating | Gold | |
| Mount | Surface Mount | |
| Mounting Type | Surface Mount | |
| Package / Case | 16-TSSOP (0.173, 4.40mm Width) | |
| Number of Pins | 16Pins | |
| Operating Temperature | -40°C~125°C | |
| Packaging | Tube | |
| Series | 74LVC | |
| JESD-609 Code | e4 | |
| Part Status | Active | |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) | |
| Number of Terminations | 16Terminations | |
| Voltage - Supply | 1.65V~3.6V | |
| Terminal Position | DUAL | |
| Terminal Form | GULL WING | |
| Peak Reflow Temperature (Cel) | 260 | |
| Supply Voltage | 3.3V | |
| Terminal Pitch | 0.65mm | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Base Part Number | 74LVC595 | |
| Function | Serial to Parallel, Serial | |
| Output Type | Tri-State | |
| Operating Supply Voltage | 3.3V | |
| Supply Voltage-Max (Vsup) | 3.6V | |
| Propagation Delay | 4 ns | |
| Turn On Delay Time | 18.2 ns | |
| Family | LVC/LCX/Z | |
| Logic Function | Shift Register | |
| Direction | Unidirectional | |
| Output Characteristics | 3-STATE | |
| Logic Type | Shift Register | |
| Output Polarity | TRUE | |
| Number of Bits per Element | 8Bits per Elements | |
| Trigger Type | POSITIVE EDGE | |
| Number of Input Lines | 1Input Line | |
| Number of Output Lines | 9Output Lines | |
| Length | 5mm | |
| Width | 4.4mm | |
| Radiation Hardening | No | |
| RoHS Status | ROHS3 Compliant |
74LVC595APW,112
Download datasheets and manufacturer documentation for 74LVC595APW,112
- Datasheets74LVC595A
- PCN Assembly/OriginICN6 to ICN8 Transfer 13/Jul/2013
- PCN PackagingDate Code Extended 18/Jul/2013 Label Chg 12/Mar/2017
- RohsStatementNXP-Semiconductors-company-12.pdf
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