- Integrated Circuits (ICs)
- Logic - Flip Flops
- 74LVC1G80GN
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74LVC1G80GN
Nexperia 74LVC1G80GN technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Surface Mount | YES | |
| Number of Terminals | 6Terminals | |
| ECCN (US) | EAR99 | |
| Logic Family | LVC | |
| Number of Channels per Chip | 1 | |
| Number of Elements per Chip | 1 | |
| Number of Element Inputs | 1Element Input | |
| Number of Element Outputs | 1Element Output | |
| Bus Hold | No | |
| Triggering Type | Positive-Edge | |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 2.4(Typ)@3.3V|2.5(Typ)@2.7V|1.8(Typ)@5V | |
| Absolute Propagation Delay Time (ns) | 13 | |
| Process Technology | CMOS | |
| Input Signal Type | Single-Ended | |
| Maximum Low Level Output Current (mA) | 32 | |
| Maximum High Level Output Current (mA) | -32 | |
| Minimum Operating Supply Voltage (V) | 1.65 | |
| Typical Operating Supply Voltage (V) | 5|1.8|2.5|3.3 | |
| Maximum Operating Supply Voltage (V) | 5.5 | |
| Maximum Quiescent Current (mA) | 0.0001(Typ) | |
| Propagation Delay Test Condition (pF) | 50 | |
| Minimum Operating Temperature (°C) | -40 | |
| Maximum Operating Temperature (°C) | 125 | |
| Supplier Package | XSON | |
| Mounting | Surface Mount | |
| Package Height | 0.31(Max) | |
| Package Length | 0.9 | |
| Package Width | 1 | |
| PCB changed | 6 | |
| Package Description | SON, | |
| Package Style | SMALL OUTLINE | |
| Moisture Sensitivity Levels | 1 | |
| Package Body Material | PLASTIC/EPOXY | |
| Operating Temperature-Min | -40 °C | |
| Reflow Temperature-Max (s) | 30 | |
| Operating Temperature-Max | 125 °C | |
| Rohs Code | Yes | |
| Manufacturer Part Number | 74LVC1G80GN | |
| Supply Voltage-Nom (Vsup) | 3.3 V | |
| Package Code | SON | |
| Package Shape | RECTANGULAR | |
| Manufacturer | Nexperia | |
| Part Life Cycle Code | Active | |
| Ihs Manufacturer | NEXPERIA | |
| Risk Rank | 5.39 | |
| JESD-609 Code | e3 | |
| Part Status | Active | |
| Terminal Finish | Tin (Sn) | |
| HTS Code | 8542.39.00.01 | |
| Technology | CMOS | |
| Terminal Position | DUAL | |
| Terminal Form | NO LEAD | |
| Peak Reflow Temperature (Cel) | 260 | |
| Number of Functions | 1Function | |
| Terminal Pitch | 0.3 mm | |
| Reach Compliance Code | compliant | |
| Pin Count | 6 | |
| JESD-30 Code | R-PDSO-N6 | |
| Qualification Status | Not Qualified | |
| Polarity | Inverting | |
| Supply Voltage-Max (Vsup) | 5.5 V | |
| Temperature Grade | AUTOMOTIVE | |
| Supply Voltage-Min (Vsup) | 1.65 V | |
| Number of Bits | 1Bit | |
| Family | LVC/LCX/Z | |
| Logic Function | D-Type | |
| Seated Height-Max | 0.35 mm | |
| Output Polarity | INVERTED | |
| Logic IC Type | D FLIP-FLOP | |
| Trigger Type | POSITIVE EDGE | |
| Propagation Delay (tpd) | 13 ns | |
| fmax-Min | 200 MHz | |
| Width | 0.9 mm | |
| Length | 1 mm | |
| RoHS Status | RoHS Compliant |
74LVC1G80GN
Download datasheets and manufacturer documentation for 74LVC1G80GN
- datasheetsnexperia-74lvc1g80gm115-datasheets-6594.pdf
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