- Integrated Circuits (ICs)
- Logic - Specialty Logic
- 74AUP2G125GF
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74AUP2G125GF
Nexperia 74AUP2G125GF technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Surface Mount | YES | |
| Number of Terminals | 8Terminals | |
| ECCN (US) | EAR99 | |
| Logic Family | AUP | |
| Number of Elements per Chip | 2Elements per Chips | |
| Number of Channels per Chip | 2Channels per Chips | |
| Number of Inputs per Chip | 2Inputs per Chips | |
| Number of Input Enables per Chip | 0 | |
| Number of Outputs per Chip | 2Outputs per Chips | |
| Number of Output Enables per Chip | 2 Low | |
| Bus Hold | No | |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 8.4@1.65V to 1.95V|6.3@2.3V to 2.7V|10.8@1.4V to 1.6V|19@1.1V to 1.3V|5.8@3V to 3.6V | |
| Absolute Propagation Delay Time (ns) | 25.3 | |
| Process Technology | CMOS | |
| Input Signal Type | Single-Ended | |
| Maximum Low Level Output Current (mA) | 4 | |
| Maximum High Level Output Current (mA) | -4 | |
| Minimum Operating Supply Voltage (V) | 0.8 | |
| Typical Operating Supply Voltage (V) | 1.8|2.5|3.3 | |
| Maximum Operating Supply Voltage (V) | 3.6 | |
| Maximum Quiescent Current (uA) | 0.5 | |
| Propagation Delay Test Condition (pF) | 30 | |
| Maximum Power Dissipation (mW) | 250 | |
| Minimum Operating Temperature (°C) | -40 | |
| Maximum Operating Temperature (°C) | 125 | |
| Supplier Package | XSON | |
| Mounting | Surface Mount | |
| Package Height | 0.46(Max) | |
| Package Length | 1.35 | |
| Package Width | 1 | |
| PCB changed | 8 | |
| Package Description | SON-8 | |
| Package Style | SMALL OUTLINE, VERY THIN PROFILE | |
| Moisture Sensitivity Levels | 1 | |
| Package Body Material | PLASTIC/EPOXY | |
| Operating Temperature-Min | -40 °C | |
| Reflow Temperature-Max (s) | 30 | |
| Operating Temperature-Max | 125 °C | |
| Rohs Code | Yes | |
| Manufacturer Part Number | 74AUP2G125GF | |
| Supply Voltage-Nom (Vsup) | 1.1 V | |
| Package Code | VSON | |
| Package Shape | RECTANGULAR | |
| Manufacturer | Nexperia | |
| Part Life Cycle Code | Not Recommended | |
| Ihs Manufacturer | NEXPERIA | |
| Risk Rank | 5.43 | |
| JESD-609 Code | e3 | |
| Part Status | NRND | |
| Terminal Finish | Tin (Sn) | |
| HTS Code | 8542.39.00.01 | |
| Technology | CMOS | |
| Terminal Position | DUAL | |
| Terminal Form | NO LEAD | |
| Peak Reflow Temperature (Cel) | 260 | |
| Number of Functions | 2Functions | |
| Terminal Pitch | 0.35 mm | |
| Reach Compliance Code | compliant | |
| Pin Count | 8 | |
| JESD-30 Code | R-PDSO-N8 | |
| Qualification Status | Not Qualified | |
| Output Type | 3-State | |
| Polarity | Non-Inverting | |
| Supply Voltage-Max (Vsup) | 3.6 V | |
| Temperature Grade | AUTOMOTIVE | |
| Supply Voltage-Min (Vsup) | 0.8 V | |
| Number of Ports | 2Ports | |
| Number of Bits | 1Bit | |
| Family | AUP/ULP/V | |
| Logic Function | Buffer/Line Driver | |
| Output Characteristics | 3-STATE | |
| Seated Height-Max | 0.5 mm | |
| Output Polarity | TRUE | |
| Logic IC Type | BUS DRIVER | |
| Propagation Delay (tpd) | 24 ns | |
| Width | 1 mm | |
| Length | 1.35 mm | |
| RoHS Status | RoHS Compliant |
74AUP2G125GF
Download datasheets and manufacturer documentation for 74AUP2G125GF
- datasheetsnexperia-74aup2g125gn115-datasheets-5563.pdf
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