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74ABT573AN,112
Nexperia 74ABT573AN,112 technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| PCB changed | 20 | |
| Package Width | 6.4(Max) | |
| Package Length | 26.29(Max) | |
| Package Height | 3.2(Max) | |
| Mounting | Through Hole | |
| Supplier Package | PDIP | |
| Maximum Operating Temperature (°C) | 85 | |
| Minimum Operating Temperature (°C) | -40 | |
| Propagation Delay Test Condition (pF) | 50 | |
| Maximum Quiescent Current (uA) | 30000 | |
| Typical Quiescent Current (uA) | 24000 | |
| Maximum Operating Supply Voltage (V) | 5.5 | |
| Typical Operating Supply Voltage (V) | 5 | |
| Minimum Operating Supply Voltage (V) | 4.5 | |
| Maximum High Level Output Current (mA) | -32 | |
| Maximum Low Level Output Current (mA) | 64 | |
| Process Technology | BiCMOS | |
| Absolute Propagation Delay Time (ns) | 5.7 | |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 4.8@5V | |
| Set/Reset | No | |
| Bus Hold | No | |
| Number of Output Enables per Element | 1 | |
| Number of Outputs per Chip | 8Outputs per Chips | |
| Number of Selection Inputs per Element | 0 | |
| Number of Input Enables per Element | 1 | |
| Number of Inputs per Chip | 8Inputs per Chips | |
| Number of Elements per Chip | 1 | |
| Number of Channels per Chip | 8Channels per Chips | |
| Latch Mode | Transparent | |
| Logic Family | ABT | |
| ECCN (US) | EAR99 | |
| Packaging | Bulk | |
| Part Status | Obsolete | |
| Type | D-Type | |
| Pin Count | 20 | |
| Output Type | 3-State | |
| Polarity | Non-Inverting | |
| RoHS Status | Supplier Unconfirmed |
74ABT573AN,112
Download datasheets and manufacturer documentation for 74ABT573AN,112
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