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MAX913EPA Tech Specifications
Maxim Integrated MAX913EPA technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Factory Lead Time | 6 Weeks | |
| Mount | Through Hole | |
| Mounting Type | Through Hole | |
| Package / Case | 8-DIP (0.300, 7.62mm) | |
| Number of Pins | 8Pins | |
| Number of Elements | 1 Element | |
| Operating Temperature | -40°C~85°C | |
| Packaging | Tube | |
| Published | 2003 | |
| JESD-609 Code | e3 | |
| Pbfree Code | yes | |
| Part Status | Active | |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) | |
| Number of Terminations | 8Terminations | |
| ECCN Code | EAR99 | |
| Type | with Latch | |
| Terminal Finish | Matte Tin (Sn) | |
| Max Power Dissipation | 727mW | |
| Terminal Position | DUAL | |
| Number of Functions | 1Function | |
| Supply Voltage | 5V | |
| Terminal Pitch | 2.54mm | |
| Base Part Number | MAX913 | |
| Pin Count | 8 | |
| Output Type | Complementary, TTL | |
| Operating Supply Voltage | 5V | |
| Nominal Supply Current | -1mA | |
| Output Current | 20mA | |
| Max Supply Current | -1mA | |
| Propagation Delay | 14 ns | |
| Quiescent Current | 10mA | |
| Response Time | 10 ns | |
| Common Mode Rejection Ratio | 110 dB | |
| Voltage - Supply, Single/Dual (±) | 5V~10V | |
| Input Offset Voltage (Vos) | 2mV | |
| Neg Supply Voltage-Nom (Vsup) | -5V | |
| Voltage Gain | 70.88dB | |
| Power Supply Rejection Ratio (PSRR) | 100dB | |
| Supply Voltage Limit-Max | 7V | |
| Input Bias Current | 5μA | |
| Current - Quiescent (Max) | 10mA | |
| Voltage - Input Offset (Max) | 2mV @ ±5V | |
| Current - Input Bias (Max) | 5μA @ ±5V | |
| CMRR, PSRR (Typ) | 110dB CMRR, 100dB PSRR | |
| Height | 4.45mm | |
| Length | 9.91mm | |
| Width | 7.87mm | |
| REACH SVHC | Unknown | |
| Radiation Hardening | No | |
| RoHS Status | ROHS3 Compliant | |
| Lead Free | Lead Free |
MAX913EPA Documents
Download datasheets and manufacturer documentation for MAX913EPA
- DatasheetsMAX912,913 Part Numbering System
- Application NotesUnderstanding LVDS Fail-Safe Circuits Read Isolated Digital States Without Power Drain Level Shifting Digital Signals
- ConflictMineralStatementMaxim-Integrated-company-65.pdf
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