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DS28E10R T Tech Specifications
Maxim Integrated DS28E10R T technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Factory Lead Time | 6 Weeks | |
| Mounting Type | Surface Mount | |
| Package / Case | TO-236-3, SC-59, SOT-23-3 | |
| Surface Mount | YES | |
| Number of Pins | 3Pins | |
| Memory Types | Non-Volatile | |
| Operating Temperature | -40°C~85°C TA | |
| Packaging | Tape & Reel (TR) | |
| Published | 2011 | |
| JESD-609 Code | e3 | |
| Pbfree Code | yes | |
| Part Status | Active | |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) | |
| Number of Terminations | 3Terminations | |
| ECCN Code | EAR99 | |
| Terminal Finish | Matte Tin (Sn) | |
| Voltage - Supply | 2.8V~3.6V | |
| Terminal Position | DUAL | |
| Number of Functions | 1Function | |
| Terminal Pitch | 0.95mm | |
| Base Part Number | DS28E10 | |
| Pin Count | 3 | |
| Supply Voltage-Min (Vsup) | 2.8V | |
| Memory Size | 224b 28 x 8 | |
| Memory Format | EPROM | |
| Memory Interface | 1-Wire® | |
| Organization | 64X1 | |
| Memory Width | 1 | |
| Memory Density | 64 bit | |
| Parallel/Serial | SERIAL | |
| Length | 2.92mm | |
| Height Seated (Max) | 1.12mm | |
| Radiation Hardening | No | |
| RoHS Status | ROHS3 Compliant |
DS28E10R T Documents
Download datasheets and manufacturer documentation for DS28E10R T
- DatasheetsDS28E10 Series Datasheet
- Environmental InformationMaterial Declaration DS28E10R T
- Application NotesProtect Your FPGA Against Piracy: Cost-Effective Authentication Scheme Protects IP in SRAM-Based FPGA Designs Xilinx? FPGA IFF Copy Protection with 1-Wire? SHA-1 Secure Memories
- ConflictMineralStatementMaxim-Integrated-company-65.pdf
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