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J113 Tech Specifications

Linear Integrated Systems  J113 technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.

Surface Mount NO
Number of Terminals 3Terminals
Transistor Element Material SILICON
Exterior Housing Material 1
Rohs Code Yes
Part Life Cycle Code Active
Ihs Manufacturer LINEAR INTEGRATED SYSTEMS INC
Part Package Code TO-92
Operating Temperature-Max 135 °C
Package Body Material PLASTIC/EPOXY
Package Shape ROUND
Package Style CYLINDRICAL
JESD-609 Code e3
Pbfree Code Yes
ECCN Code EAR99
Terminal Finish MATTE TIN
Terminal Position BOTTOM
Terminal Form THROUGH-HOLE
Reach Compliance Code compliant
Pin Count 3
JESD-30 Code O-PBCY-T3
Qualification Status Not Qualified
Configuration SINGLE
Operating Mode DEPLETION MODE
Transistor Application SWITCHING
Polarity/Channel Type N-CHANNEL
JEDEC-95 Code TO-92
Drain-source On Resistance-Max 100 Ω
FET Technology JUNCTION
Feedback Cap-Max (Crss) 5 pF
Saturation Current 1
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J113 Documents

Download datasheets and manufacturer documentation for   J113

J113 brand manufacturers: Linear Integrated Systems, Twicea stock, J113 reference price.Linear Integrated Systems. J113 parameters, J113 Datasheet PDF and pin diagram description download.You can use the J113 Transistors - Special Purpose, DSP Datesheet PDF, find J113 pin diagram and circuit diagram and usage method of function,J113 electronics tutorials.You can download from the Twicea.