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CD40105BDMSR

Intersil  CD40105BDMSR technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.

Surface Mount NO
Number of Terminals 16Terminals
Manufacturer Part Number CD40105BDMSR
Rohs Code Yes
Part Life Cycle Code Active
Ihs Manufacturer RENESAS ELECTRONICS CORP
Part Package Code SBDIP
Package Description METAL SEALED, CERAMIC, DIP-16
Manufacturer Package Code D16.316
Risk Rank 5.43
Samacsys Description RH Shift Registers CMOS FIFO Register
Number of Words 16 wordsWord
Number of Words Code 16Words Codes
Operating Temperature-Max 125 °C
Operating Temperature-Min -55 °C
Package Body Material CERAMIC, METAL-SEALED COFIRED
Package Code DIP
Package Shape RECTANGULAR
Package Style IN-LINE
Supply Voltage-Nom (Vsup) 15 V
Reflow Temperature-Max (s) NOT SPECIFIED
JESD-609 Code e3
ECCN Code EAR99
Terminal Finish MATTE TIN
Additional Feature INPUT AC PARAMETRIC VALUES NOT FROM POST RADIATION MEASUREMENT; REGISTER BASED
HTS Code 8542.32.00.71
Terminal Position DUAL
Terminal Form THROUGH-HOLE
Peak Reflow Temperature (Cel) NOT SPECIFIED
Number of Functions 1Function
Terminal Pitch 2.54 mm
Reach Compliance Code compliant
Pin Count 16
JESD-30 Code R-CDIP-T16
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 18 V
Temperature Grade MILITARY
Supply Voltage-Min (Vsup) 3 V
Operating Mode SYNCHRONOUS
Organization 16X4
Seated Height-Max 5.08 mm
Memory Width 4
Memory Density 64 bit
Parallel/Serial PARALLEL
Output Enable YES
Cycle Time 900.9 ns
Total Dose 100k Rad(Si) V
Width 7.62 mm
CD40105BDMSR brand manufacturers: Intersil (Renesas Electronics America), Twicea stock, CD40105BDMSR reference price.Intersil (Renesas Electronics America). CD40105BDMSR parameters, CD40105BDMSR Datasheet PDF and pin diagram description download.You can use the CD40105BDMSR Logic - FIFOs Memory, DSP Datesheet PDF, find CD40105BDMSR pin diagram and circuit diagram and usage method of function,CD40105BDMSR electronics tutorials.You can download from the Twicea.