- Integrated Circuits (ICs)
- Embedded - PLDs (Programmable Logic Device)
- XAC2C128-8VQG100Q
AMD XAC2C128-8VQG100Q Programmable Logic Devices
XAC2C128-8VQG100Q
126-491-XAC2C128-8VQG100Q
Output Function: MACROCELL,Number of Macro Cells: 128Macro Cells
Min. : 1
Mult. : 1
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XAC2C128-8VQG100Q
AMD XAC2C128-8VQG100Q technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Surface Mount | YES | |
| Number of Terminals | 100Terminals | |
| Rohs Code | Yes | |
| Part Life Cycle Code | Active | |
| Ihs Manufacturer | ADVANCED MICRO DEVICES INC | |
| Package Description | 14 X 14 MM, 0.50 MM PITCH, LEAD FREE, VQFP-100 | |
| Clock Frequency-Max | 119 MHz | |
| Moisture Sensitivity Levels | 3 | |
| Number of I/O Lines | 80I/O Lines | |
| Operating Temperature-Max | 125 °C | |
| Operating Temperature-Min | -40 °C | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Code | QFF | |
| Package Equivalence Code | TQFP100,.63SQ | |
| Package Shape | SQUARE | |
| Package Style | FLATPACK | |
| Supply Voltage-Max | 1.9 V | |
| Supply Voltage-Min | 1.7 V | |
| Supply Voltage-Nom | 1.8 V | |
| JESD-609 Code | e3 | |
| Terminal Finish | MATTE TIN | |
| Additional Feature | YES | |
| Terminal Position | QUAD | |
| Terminal Form | FLAT | |
| Peak Reflow Temperature (Cel) | 260 | |
| Terminal Pitch | 0.5 mm | |
| Reach Compliance Code | compliant | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| JESD-30 Code | S-PQFP-F100 | |
| Number of Outputs | 80Outputs | |
| Qualification Status | Not Qualified | |
| Temperature Grade | AUTOMOTIVE | |
| Propagation Delay | 7.5 ns | |
| Architecture | PLA-TYPE | |
| Number of Inputs | 80Inputs | |
| Organization | 0 DEDICATED INPUTS, 80 I/O | |
| Seated Height-Max | 1.2 mm | |
| Programmable Logic Type | FLASH PLD | |
| Screening Level | AEC-Q100 | |
| Output Function | MACROCELL | |
| Number of Macro Cells | 128Macro Cells | |
| JTAG BST | YES | |
| In-System Programmable | YES | |
| Length | 14 mm | |
| Width | 14 mm |
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